METHOD OF MAKING SOI CIRCUIT WITH BURIED CONNECTORS

Patent №

US 5,145,802

Granted

1992-09-08

Filed 1991

Owner

UNITED TECHNOLOGIES CORPORATION, A CORP. OF DE

Lab

AI components

2

ml · hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

07790796

An SOI circuit includes a set of buried body ties that provide ohmic contact to the otherwise floating transistor bodies disposed on an insulating layer and both provide a path for holes generated by impact ionization and also act as a potential shield between the substrate potential and the transistor sources. The same fabrication technique provides a buried interconnect layer between transistors that can be employed as a mask programmable local interconnect in an ASIC such as a gate array. The process provides for independent control of differential mesa thickness and buried body tie thickness, so that fully and partially depleted transistors can be fabricated simultaneously and placed on appropriate mesas without affecting the body ties.

Machine learningAI hardwareH10D 84/038H01L 21/743H01L 21/76202H01L 21/76264H10D 84/0165H10P 90/1906H10W 10/012H10W 10/061+5 more

AI classification

AI hardware0.95
Machine learning0.94
Vision0.34
Speech0.01
Evolutionary computation0.00
Natural language0.00
Knowledge representation0.00
Planning0.00

Ownership

UNITED TECHNOLOGIES CORPORATION, A CORP. OF DE

assignment · 59100817

Assignors

TYSON, SCOTT M., WOODRUFF, RICHARD L.

On an employer assignment, the assignors are typically the inventors.

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