METHOD AND APPARATUS FOR PRODUCING SUCCESSIVE CALCULATED RESULTS IN A HIGH-SPEED COMPUTER FUNCTIONAL UNIT USING LOW-SPEED VLSI COMPONENTS

A functional unit composed of parallel data processing paths implemented in relatively low speed digital logic. A data processing path is designed in a digital logic family of high integration but relatively low speed. The path is designed to be clocked by a data processing clock where the frequency of the data processing clock is substantially the system clock divided by the number of parallel implementations of the data processing path.