Patent №
US 5,204,829
Granted
1993-04-20
Filed 1992
Owner
LSI LOGIC CORPORATION A CORP. OF DELAWARE
Lab
—
AI components
1
hardware
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
07911854
A pipelined floating point multiplier is disclosed having the capability of interleaving floating point multiplication with iterative floating point operations (calculations), such as division and square-root taking, by making use of idle stages (pipeline bubbles). This is accomplished with minimal additional circuitry over that required for conventional floating-point multipliers, and does not adversely affect the speed of iterative calculations. Method and apparatus are disclosed.
AI classification
Ownership
LSI LOGIC CORPORATION A CORP. OF DELAWARE
assignment · 61950066
Assignors
LYU, ALLEN, STEARNS, CHARLES
On an employer assignment, the assignors are typically the inventors.