ABSOLUTE VALUE ARITHMETIC CIRCUIT

An absolute value arithmetic circuit for computing the absolute value of two binary input signals, includes: a computing circuit for obtaining a difference between the two input signals, a 1's complementor for non-inverting or inverting an output from the computing circuit in accordance with a positive sign bit or a negative sign bit of the output, a priority encoder for searching an output from the 1's complementor for the position of a first "0" bit from the least significant digit of the output and delivering an encoder output indicating the position of the first "0" bit, and a bit inverting circuit for inverting and delivering a bit row from the least significant digit bit to the "0" bit in the output from the 1's complementor in accordance with the encoder output, and directly delivering a bit row from a bit higher than the "0" bit to the most significant digit bit of the output without inverting them.