CIRCUIT CONFIGURATION FOR IDENTIFICATION OF INTEGRATED SEMICONDUCTOR CIRCUITRIES

A circuit configuration for the identification of integrated semiconductor circuitries includes n programmable elements each having an output. A parallel-serial shift register has n parallel inputs each being connected to a respective one of the outputs of the n programmable elements, a data output, a control input for transferring electrical states of the programmable elements into the parallel-serial shift register, and a clock input for controlling a shift function of the parallel-serial shift register as a function of a clock signal to be applied to the clock input.