Patent US 5,283,867

A data processing system includes, among others, three memory areas: a source memory which is addressed in planar, data unit increments and stores display data units on a bit per plane basis; a target memory for storing display data units in a manner suitable for operation of a display unit; and a window buffer for transferring display data units from the source memory to the target memory. The system includes apparatus for inhibiting certain data units from the source memory from overwriting data units already in the target memory. The method comprises first accessing a plurality of data units from the source memory and then logically determining if all bits of each accessed data unit meet a predetermined criteria. Each data unit found to meet the predetermined criteria is inhibited from altering any data unit already in the target memory.