SINGLE POLY EE CELL WITH SEPARATE READ/WRITE PATHS AND REDUCED PRODUCT TERM COUPLING
Patent №
US 5,331,590
Granted
1994-07-19
Filed 1991
Owner
LATTICE SEMICONDUCTOR CORPORATION, A CORP. OF DE
Lab
—
AI components
1
hardware
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
07777769
A single poly EE cell and an array using said cell, with the array being provided electrical connections such that the select gate for the read select transistor and the select gate for the write select transistor may be separately controlled. In the array, first level metal is utilized for connection to the gates of the read and write select transistors and second level metal is utilized for connection to the product term connections of the cell.
AI classification
Ownership
LATTICE SEMICONDUCTOR CORPORATION, A CORP. OF DE
assignment · 59360456
Assignors
JOSEPHSON, GREGG R., BOWER, DOUGLAS H., TENNANT, DAVID L.
On an employer assignment, the assignors are typically the inventors.