EFFICIENT CODING SIGNAL PROCESSOR

Patent №

US 5,337,049

Granted

1994-08-09

Filed 1992

Owner

KABUSHIKI KAISHA TOSHIBA

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

07953819

An efficient coding signal processor for encoding information signals input in a sequence of block units in a manner of unifying an amount of information at a unit of N frames (N.gtoreq.1) which includes a block activity calculator for calculating a block activity for every block of the information signals in a present frame, a frame activity calculator for calculating a frame activity from the block activity of the block in the preceding frames, a code amount allocator for allocating an amount of codes for every block in the encoding process using the predicted frame activity, and a code amount allocation controller for controlling the amount of codes to be allocated for every block up to a preselected bit rate by monitoring the amount of codes allocated by the code amount allocator for the period of one frame.

AI hardwareH04N 11/044H04N 19/115H04N 19/124H04N 19/14H04N 19/149H04N 19/15H04N 19/172H04N 19/176+3 more

AI classification

AI hardware0.89
Machine learning0.13
Vision0.10
Planning0.03
Knowledge representation0.00
Natural language0.00
Speech0.00
Evolutionary computation0.00

Ownership

KABUSHIKI KAISHA TOSHIBA

assignment · 62910867

Assignors

SHIMODA, KENJI

On an employer assignment, the assignors are typically the inventors.

From the same owner

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