APPARATUS FOR VARYING DURATION OF CLOCK SIGNAL PROVIDED IN COMMON TO TWO PROCESSORS BASED UPON INSTRUCTIONS EXECUTED BY BOTH PROCESSORS

A multiprocessor system which includes a control processor and a high-level data-transfer processor. Both of these two processors are docked by a shared variable-duration clock. The duration of the clock is adjusted on the fly, to accommodate whichever of the two processors needs the longest cycle time on that particular cycle. Thus, the control processor 110 and the data transfer processor 120 are enabled to run synchronously, even though they are concurrently running separate streams of instructions.