IMAGE SIGNAL PROCESSING APPARATUS FOR ONVERTING TO FRAME FORMAT RASTERED IMAGE DATA WHICH IS SUPPLIED IN FIELD FORMAT BUT WHICH ORIGINATED IN FRAME FORMAT

An image signal processing system is described in which image data in an interlaced format is converted to full frame format prior to application of any vertical processing, A swing buffer 40 is employed with Field 0 being written into the even addresses of a DRAM 44 forming one side of the swing buffer under control of an write controller 48. Field 1 is written into the odd addresses, The data in full frame format is read from consecutive addresses in the DRAM 44 into a signal processing engine 62 whilst the next frame is being written into the DRAM 46 forming the other arm of the swing buffer 40. This arrangement allows data that was captured in full frame format to be vertically processed in full frame format thereby preserving its vertical resolution. The full frame image data was converted out of full frame format prior to receipt by the image processing system for compatibility with hardware developed for interlaced format data.