PREDICTIVE STATUS FLAG GENERATION IN A FIRST-IN FIRST-OUT (FIFO) MEMORY DEVICE METHOD AND APPARATUS
Patent №
US 5,506,809
Granted
1996-04-09
Filed 1994
Owner
SHARP MICROELECTRONICS TECHNOLOGY, INC.
+1 more
Lab
—
AI components
2
planning · hardware
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
08268170
Method and apparatus are described for generating more accurate and timely FIFO status flags. Preferably, the asynchronous FIFO read and write pointers are conventionally compared with one another and the output of such comparison is glitch-suppressed. During such operation in accordance with the invented method and apparatus, prediction signals are used to precondition the status flag output latches so that they will provide the earliest possible accurate status reflecting asynchronous read and write clock activity. If a boundary condition is present--e.g. depending upon the next read or write clock activity, the FIFO's half full status flag may change where such change is impossible to predict because it is unknowable whether the next operation will be a read or a write or both--then an asynchronous state machine takes over from the prediction flag logic to ensure accurate and early preconditioning of the status flags' output latches. When no such boundary condition is present, the state machine is dormant and the prediction logic is active.
AI classification
Ownership
SHARP MICROELECTRONICS TECHNOLOGY, INC.
assignment · 71460508
SHARP KABUSHIKI KAISHA
assignment · 73620183
Assignors
CSOPPENSZKY, MICHAEL A., NISHIURA, YOSHIKAZU
On an employer assignment, the assignors are typically the inventors.