EXCLUSIVE AND /OR PARTIALLY INCLSIVE EXTENSION CACHE SYSTEM AND METHOD TO MINIMIZE SWAPPING THRERIN

Patent №

US 5,564,035

Granted

1996-10-08

Filed 1994

Owner

INTEL CORPORATION

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

08216802

A multi-level memory system is provided having a primary cache and a secondary cache in which unnecessary swapping operations are minimized. If a memory access request misses in the primary cache, but hits in the secondary cache, then the secondary cache responds to the request. If, however, the request also misses in the secondary cache, but is found in main memory, then main memory responds to the request. In responding to the request, the secondary cache or main memory returns the requested data to the primary cache. If an address tag of a primary cache victim line does not match an address tag in the secondary cache or the primary cache victim line is dirty, then the victim is stored in the secondary cache. The primary cache victim line includes a first bit for indicating whether the address tag of the primary cache victim line matches an address tag of the secondary cache.

AI classification

AI hardware0.98
Knowledge representation0.02
Planning0.01
Natural language0.00
Evolutionary computation0.00
Vision0.00
Machine learning0.00
Speech0.00

Ownership

INTEL CORPORATION

assignment · 69530364

Assignors

LAI, KONRAD K.

On an employer assignment, the assignors are typically the inventors.

From the same owner

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