Patent US 5,583,767

A data processing device includes a data bus and a program bus, a data memory connected to the data bus and having data memory locations, and an electronic computation unit connected to the data bus and an accumulator connected to the electronic computation unit and to the data bus. A logic circuit is connected to the program bus for receiving instructions and connected to the data bus for executing logic operations in accordance with at least some of the instructions. The logic operations affect bits in at least one of the data memory locations independently of the electronic computation unit without affecting the accumulator. A control circuit sends instructions to the logic circuit on the program bus and to the electronic computation unit. Other devices, systems and methods are also disclosed.