DOMINATOR SELECTION METHOD FOR REDUCING POWER CONSUMPTION IN A CIRCUIT

A method for reducing power consumed in a circuit, the circuit having at least a first and a second primary input lead, a plurality of gates, and a plurality of edges, includes the steps of: determining a dominator edge and dominated gates in the circuit, the dominated gates coupled to the first primary input lead and to edges of the plurality of edges dominated by the dominator edge; providing a dominator selector circuit to the circuit; coupling the dominator selector circuit to the dominator edge and to the first primary input lead; uncoupling the dominated gates from the first primary input lead; and coupling the dominated gates to the dominator selector circuit.