A DECODER HAVING A SPLIT QUEUE SYSTEM FOR PROCESSING INSTRUCTIONS IN A FIRST QUEUE SEPARATE FROM THEIR ASSOCIATED DATA PROCESSED IN A SECOND QUEUE
Patent №
US 5,668,985
Granted
1997-09-16
Filed 1994
Owner
INTEL CORPOARTION
Lab
—
AI components
1
hardware
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
08204992
A split queue system for a decoder that supplies one or more micro-operations and data associated with the micro-operations. A main queue is coupled to receive one or more micro-operations from the decoder, and supply it to a next processing stage to provide a process micro-operation. A shadow queue is coupled to receive data associated with the micro-operation, in the same cycle that the micro-operation is supplied to the main queue. A control circuit is coupled to the main queue for issuing micro-operation from the main queue into the next processing stage in a first cycle, and in a second cycle issuing, the micro-operation therefrom. Also in the second cycle, the control circuit issues the data associated with the micro-operation from the shadow queue, so that the data is synchronized with its associated processed micro-operation.
AI classification
Ownership
INTEL CORPOARTION
assignment · 69800939
Assignors
CARBINE, ADRIAN L., BROWN, GARY L., HOYT, BRADLEY D., PARKER, DONALD D., KUMA, RAJESH
On an employer assignment, the assignors are typically the inventors.