Patent US 5,774,853

Speech synthesizer systems avoid the need for a multi-path address bus coupling to a CPU by provision of serial interfaces requiring a total of only two or three signal paths to a CPU. By use of a counter circuit or shift register working in cooperation with a modified trigger signal circuit, a serially encoded control signal is internally converted to binary type signals which are coupled via an internal address bus to a speech synthesis unit for production of selected speech segment output signals.