CORRELATED DOUBLE SAMPLING CIRCUIT

Patent №

US 5,838,176

Granted

1998-11-17

Filed 1997

Owner

FOVEONICS, INC.

+1 more

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

08867472

A correlated double sampling circuit comprising an input node comprising a first plate of input capacitor and an output node. A first plate of a feedback capacitor is connected to the output node and a second plate of the feedback capacitor is connected to a second plate of the input capacitor. An input transistor has a gate connected to the second plate of the input capacitor, a source connected to a first supply voltage rail, and a drain connected to the output node. A load transistor has a gate connected to a bias node, a drain connected to the output node, and a source connected to a second supply voltage rail. A reset transistor is connected between output node and the second plate of the input capacitor, and has a gate connected to a reset signal line.

AI hardwareG11C 7/067G11C 27/024

AI classification

AI hardware0.89
Natural language0.00
Vision0.00
Knowledge representation0.00
Machine learning0.00
Evolutionary computation0.00
Speech0.00
Planning0.00

Ownership

FOVEONICS, INC.

assignment · 87960292

FOVEON, INC.

namechg · 117120372

Assignors

DELBRUCK, TOBIAS, MEAD, CARVER A.

On an employer assignment, the assignors are typically the inventors.

From the same owner

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