Patent №
US 5,880,982
Granted
1999-03-09
Filed 1997
Owner
SECRETARY OF STATE FOR DEFENCE IN HER BRITANNIC MAJESTY'S GOVERNMENT OF THE UNITED KINGDOM OF GREAT BRITAIN AND NORTHERN IRELAND, THE
Lab
—
AI components
1
hardware
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
08809098
A digital arithmetic circuit includes an inverting circuit connected to a digital circuit in which errors are to be detected. An operand input to the circuit produces an output result in a first operation which is stored in a comparison circuit. The operand is inverted by the inverting circuit on a second cycle of operation of the circuit and the output result is compared by the comparison circuit with that from the first operation. A non-zero result from the comparison indicates the occurrence of an error or errors in the operation of the circuit.
AI classification
Ownership
SECRETARY OF STATE FOR DEFENCE IN HER BRITANNIC MAJESTY'S GOVERNMENT OF THE UNITED KINGDOM OF GREAT BRITAIN AND NORTHERN IRELAND, THE
assignment · 84790641
Assignors
EVANS, RICHARD ANTHONY
On an employer assignment, the assignors are typically the inventors.