METHOD AND APPARATUS FOR CACHING SYSTEM MANAGEMENT MODE INFORMATION WITH OTHER INFORMATION

Patent №

US 5,909,696

Granted

1999-06-01

Filed 1996

Owner

INTEL CORPORATION

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

08656922

A novel method and apparatus to cache System Management Mode (SMM) data with other data to improve performance and reduce latency of SMM handler routines. This method and apparatus allows SMM data and non-SMM data to be distinguished in the cache without requiring extra cache bits which can add to the cost of implementation. Since SMM data and non-SMM data can coexist in the cache, there is no need for time consuming cache flush cycles when switching between the two modes. Since SMM data can be cached, performance of SMM routines are improved. This method and apparatus defines the SMRAM address range to be a range of addresses representable by the tag, but not directly corresponding to installed main memory. When accesses are made to SMRAM addresses, they are redirected to an unused portion of main memory. Protection mechanisms may be implemented to limit access to these SMRAM addresses when not in SMM.

AI hardwareG06F 12/1491G06F 12/0802G06F 12/0284G06F 12/1441G06F 12/1475

AI classification

AI hardware1.00
Planning0.01
Natural language0.00
Evolutionary computation0.00
Speech0.00
Knowledge representation0.00
Machine learning0.00
Vision0.00

Ownership

INTEL CORPORATION

assignment · 80490839

Assignors

REINHARDT, DENNIS, HORIGAN, JOHN W., KARDACH, JAMES P., SONGER, NEIL

On an employer assignment, the assignors are typically the inventors.

From the same owner

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