AC CHECKPOINT RESTART TYPE FAULT TOLERANT COMPUTER SYSTEM

A checkpoint restart type computer system which executes a program upon taking a checkpoint periodically for rolling back to a prior checkpoint if an error status is detected during an execution of a program, including a memory for storing a program which includes a plurality of ESD steps between particular two checkpoints, and a processor for executing the program with holding a checkpoint periodically. The processor includes a memory for maintaining a checkpoint image which has been taken during execution of the program. The ESD steps in the program contain at least a designated execution level for the ESD step and an error status detecting code. The computer system further includes a designator for designating the execution level for the program and a classifier for classifying the execution of the ESD steps by comparing the designated execution level and the allowed execution level for the ESD sequence. When an error status is detected during the execution of the program, the designator changes the execution level of the program from a low to a high frequency so as to increase the number of executions of the ESD steps for specifying a particular position of an error status as early as possible.