Patent US 5,911,041

A computer implemented method and computer system for testing a target software product is presented. The method includes constructing a finite state machine in which portions of the target product are ascribed to states of the state machine. The state machine may correspond to a predetermined test case for the target software product. A number of state functions are provided, each of the state functions performing at least one verification on the target software product. The state functions also may include means for transitioning from one state to the next, for example, by a "next window" a "previous window" action if the target software program is a windows based program. The state functions may also verify that a current state in which the state machine exists is a correct state, may verify information that is supposed to have been written to a memory is written in fact to the memory, and may verify that the path to the information is correct. Information is furnished to the state machine for use by the target software product portions ascribed to states of the state machine. The information may include test case information from a test computer to the target software product as required by a test case being performed.