Patent №
US 5,918,035
Granted
1999-06-29
Filed 1995
Owner
IMEC VZW
+1 more
Lab
—
AI components
3
ml · planning · hardware
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
08441332
A method of modeling a programmable processor is particularly adapted for use in an automatic retargetable code generator and instruction set simulator. The method represents the processor as a single graph with vertices and edges. The graph includes the instruction set of the processor and includes information about the hardware of the processor. The graph is linked to tools and libraries required to program and simulate the processor.
AI classification
Ownership
IMEC VZW
assignment · 75740201
SYNOPSYS, INC.
assignment · 331040864
Assignors
VAN PRAET, JOHAN ROLAND, LANNEER, DIRK, GUERTS, WERNER GUSTAFF THERESIA, GOOSSENS, GERT LODEWIJK HUIBRECHT
On an employer assignment, the assignors are typically the inventors.