FERROELECTRIC MEMORY DEVICE

To present a ferroelectric memory device capable of further decreasing fluctuations of reference potential in reference memory cell system. To achieve the object, the ferroelectric memory device comprises, as shown, for example, in FIG. 1, a reference potential generating circuit in a system for generating a reference potential by averaging the potentials being read out from two ferroelectric capacitors for reference memory cells CD00, CD20 storing data of high level, and two ferroelectric capacitors for reference memory cells CD10, CD30 storing data of low level.