Patent №
US 6,008,549
Granted
1999-12-28
Filed 1999
Owner
ELDEC CORPORATION
Lab
—
AI components
1
planning
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
09272721
A switching circuit (50) comprising cascaded transistor stages (52a, 52b. . . 52n and 54), connected between a high voltage terminal (62) and a sense resistor (RS) coupled to a low voltage terminal (64). The transistor stage (54) closest to the sense resistor (RS) is referred to as a current gain stage (54), and all the other transistor stages (52a, 52b. . . 52n) are referred to as component stages (52a, 52b. . . 52n). Blocking diodes (DD) are connected across all stages (52a, 52b. . . 52n and 54), forming a continuous path between the high voltage terminal (62) and the low voltage terminal (64). When an enable signal is provided to the current gain stage (54), the transistor stages (52a, 52b. . . 52n and 54) sequentially enter conduction, beginning with the current gain stage (54) and proceeding through the component stages (52a, 52b. . . 52n). As each transistor stage (52a, 52b. . . 52n) enters conduction, the resulting voltage drop will cause each corresponding blocking diode (DD) to avalanche, allowing current to flow. Eventually, all of the component stages (52a, 52b. . . 52n) are turned on, creating a conductive path through the stages (52a, 52b. . . 52n) and completing the switching of the switching circuit (50).
AI classification
Ownership
ELDEC CORPORATION
assignment · 99530416
Assignors
COOPER, JAMES L., ADAMS, MARK (NMI)
On an employer assignment, the assignors are typically the inventors.