INSTRUCTION CONTROLLING SYSTEM AND METHOD THEREOF

Patent №

US 6,016,541

Granted

2000-01-18

Filed 1998

Owner

FUJITSU LIMITED

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

09042797

A general-purpose register address output from an instruction register is read and changed to a corresponding register update buffer address in an update table. Additionally, the update reservation instructing bit corresponding to the general-purpose register address is read out from a register update reservation table. If its value is "0", the general-purpose register address is provided to the general-purpose register, and the data stored at that address is input to an arithmetic unit. If the value of the bit is "1", the contents of the corresponding entry in the update table is registered to a reservation station. The reservation station determines the execution order of respective entries, and sequentially provides a register update buffer address to a register update buffer, and inputs the data stored at that address to the arithmetic unit.

AI hardwareG06F 9/384G06F 9/3824G06F 9/3836G06F 9/3858

AI classification

AI hardware0.99
Evolutionary computation0.02
Natural language0.01
Vision0.00
Knowledge representation0.00
Planning0.00
Machine learning0.00
Speech0.00

Ownership

FUJITSU LIMITED

assignment · 90490264

Assignors

TASHIMA, KYOKO, ASAKAWA, TAKEO, INOUE, AIICHIRO

On an employer assignment, the assignors are typically the inventors.

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