Patent №
US 6,043,674
Granted
2000-03-28
Filed 1998
Owner
THESEUS LOGIC, INC.
Lab
—
AI components
2
ml · hardware
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
09004336
Threshold logic gates are disclosed that respond to signals that may assume at least a first state having an arithmetic or logic meaning, and a second NULL state that has no arithmetic or logic meaning. Threshold values may be equal to or less than the number of input signal lines. Threshold gates switch their outputs from NULL to a meaningful state when the threshold number of inputs assume meaningful states. Gates will hold outputs in a meaningful (or non-null) state when the number of asserted inputs remains positive, even if the number is less than the threshold. In one embodiment, threshold gates include a "FLASH" input that forces the gate to NULL. In another embodiment, threshold gates include one or more "SET" inputs that drive the gate output to NULL or to a meaningfull state.
AI classification
Ownership
THESEUS LOGIC, INC.
assignment · 89570591
Assignors
SOBELMAN, GERALD EDWARD
On an employer assignment, the assignors are typically the inventors.