NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE

A non-volatile semiconductor memory device according to the present invention includes: a memory cell including a capacitor having a ferroelectric film interposed between and a first electrode and a second electrode, the capacitor being capable of retaining binary information responsive to the ferroelectric film taking one of first and second polarization states, and a transistor having a source, a drain, and a gate, the source being coupled to the first electrode of the capacitor; a word line coupled to the gate of the transistor; a bit line coupled to the drain of the transistor; a plate line coupled to the second electrode of the capacitor; and a sense amplifier coupled to the bit line. When performing a read operation for the memory cell, a voltage on the bit line is amplified to a supply voltage by the sense amplifier if the ferroelectric film is in the first polarization state; and the voltage on the bit line is amplified to a negative voltage by the sense amplifier if the ferroelectric film is in the second polarization state.