Patent №
US 6,058,466
Granted
2000-05-02
Filed 1997
Owner
SUN MICROSYSTEMS, INC.
Lab
—
AI components
1
hardware
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
08881732
A system of executing coded instructions in a dynamically configurable multiprocessor having shared execution resources including steps of placing a first processor in an active state upon booting of the multiprocessor. In response to a processor create command, a second processor is placed in an active state. When either the first or second processor encounter a cache miss that has to be serviced by off-chip cache the processor requiring service is placed in nap state in which instruction fetching for that processor is disabled. When either the first or second processor encounter a cache miss that has to be serviced by main memory, the processor requiring services is placed in a sleep state by flushing all instructions from the processor in the sleep state and disabling instruction fetching for the processor in the sleep state.
AI classification
Ownership
SUN MICROSYSTEMS, INC.
assignment · 89170592
Assignors
PANWAR, RAMESH, CHAMDANI, JOSEPH I.
On an employer assignment, the assignors are typically the inventors.