Patent №
US 6,092,124
Granted
2000-07-18
Filed 1998
Owner
NVIDIA CORPORATION
Lab
AI components
1
hardware
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
09061719
A direct memory access (DMA) circuit which is physically positioned with an input/output device, the DMA circuit storing a first reference value pointing to a data structure which describes a buffer portion of system memory in which data is stored for transfer to the I/O device, a value determining a position within the buffer portion of system memory beginning at which a next sequence of data is to be placed, and a value determining a position within the buffer portion of system memory from which a next sequences of data is to be copied to the I/O device, the DMA circuit including circuitry for reading data from the buffer portion of system memory beginning at the position from which a next sequences of data is to be copied and for writing the data read to the I/O device.
AI classification
Ownership
NVIDIA CORPORATION
assignment · 92440148
Assignors
PRIEM, CURTIS, IWAMOTO, RICK, JOHNSON, STEPHEN
On an employer assignment, the assignors are typically the inventors.