METHOD OF FABRICATING A SEMICONDUCTOR DEVICE HAVING POLYSILICON LINE WITH EXTENDED SILICIDE LAYER

Patent №

US 6,096,643

Granted

2000-08-01

Filed 1998

Owner

ADVANCED MICRO DEVICES

Lab

AI components

1

planning

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

09164956

A semiconductor device and fabrication process are provided in which a polysilicon line is disposed on a substrate of the semiconductor device. The polysilicon line may, for example, be a gate electrode. A dielectric layer is disposed adjacent the polysilicon line and an extended silicide layer is formed over the polysilicon line. The extended silicide layer may be formed by forming a patterned metal layer over the polysilicon line, forming a polysilicon layer over the patterned metal layer, and reacting the patterned metal layer with the polysilicon layer to form the extended silicide layer over the polysilicon line. The device may further include a second polysilicon line, such as a gate electrode, and the silicide layer may extend over the top of the second polysilicon line and interconnects the two polysilicon lines.

PlanningH01L 21/76885H10W 20/063H01L 21/76889H01L 21/76895H10W 20/066H10W 20/0698

AI classification

Planning0.77
Natural language0.06
Vision0.03
Speech0.00
Machine learning0.00
Knowledge representation0.00
Evolutionary computation0.00
AI hardware0.00

Ownership

ADVANCED MICRO DEVICES

assignment · 94980254

Assignors

NARIMAN, HOMI E., FULFORD, H. JIM, MAY, CHARLES E.

On an employer assignment, the assignors are typically the inventors.

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