APPARATUS AND METHOD FOR FAST FORWARD BRANCH

An apparatus and method are provided for executing a forward branch in a microprocessor. The apparatus has translation logic and instruction fetch logic. The translation logic utilizes a branch predictor to determine if a conditional branch should be taken or not. If the branch is predicted taken, then a branch accelerator in the instruction fetch logic determines if a branch target instruction has already been stored for translation in an instruction buffer by summing the length of the conditional branch instruction to a displacement provided by the conditional branch instruction. If the branch target instruction is already within the instruction buffer, contents of the instruction buffer are simply shifted by the number of bytes indicated by the sum to move the branch target instruction to the front of the buffer.