Patent №
US 6,269,467
Granted
2001-07-31
Filed 1999
Owner
CADENCE DESIGN SYSTEMS, INC.
Lab
—
AI components
2
ml · planning
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
09410356
A method and apparatus for designing a circuit system, including selecting a plurality of pre-designed circuit blocks to be used to design the circuit system, collecting data reflecting the experience of the designer regarding the pre-designed circuit blocks, the designer's experience being adaptable to a processing method, accepting or rejecting a design of the circuit system in a manner based on the designer's experience data and acceptable degree of risk, upon acceptance, forming block specifications containing criteria and modified constraints for each of the circuit blocks, upon acceptance, forming block specifications for deploying the circuit blocks on a floor plan of a chip, as a system on a chip, in compliance with the criteria and modified constraints, and substantially without changing the selected circuit block and the processing method.
AI classification
Ownership
CADENCE DESIGN SYSTEMS, INC.
assignment · 105460770
Assignors
CHANG, HENRY, COOKE, LARRY, HUNT, MERRILL, KE, WUUDIANN, LENNARD, CHRISTOPHER K., MARTIN, GRANT, PATERSON, PETER, TRUONG, KHOAN, VENKATRAMANI, KUMAR
On an employer assignment, the assignors are typically the inventors.