METHODS FOR DETERMINING ON-CHIP INTERCONNECT PROCESS PARAMETERS

Patent №

US 6,312,963

Granted

2001-11-06

Filed 1999

Owner

APACHE DESIGN SOLUTIONS, INC.

+1 more

Lab

AI components

1

vision

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

09245812

A method provides estimations of physical interconnect process parameter values in a process for manufacturing integrated circuits. The method includes fabricating test structures each providing a value of a measurable quantity corresponding to a value within a range of values of the physical interconnect process parameters. In some embodiments, the measured value is used to derive the values of the physical interconnect process parameters, either by a numerical method using a field solver, or by a closed-form solution. The values of physical interconnect process parameters involving physical dimensions are also obtained by measuring photomicrographs obtained using a scanning electron microscope from cross sections of test structures. In some embodiments, a family of test structures corresponding to a range of conductor widths and a range of spacings between conductors are measured.

VisionH01L 22/34H10P 74/277H01L 2924/0002

AI classification

Vision1.00
Planning0.19
Machine learning0.11
Speech0.01
AI hardware0.01
Natural language0.00
Evolutionary computation0.00
Knowledge representation0.00

Ownership

APACHE DESIGN SOLUTIONS, INC.

assignment · 260150111

APACHE DESIGN, INC.

namechg · 275000127

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