Patent №
US 6,320,964
Granted
2001-11-20
Filed 1998
Owner
INTEL CORPORATION
Lab
—
AI components
1
hardware
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
09140166
A cryptographic accelerator for handling instruction-intensive bit permutations. The cryptographic accelerator comprises a selector and a plurality of buses coupled to the selector. Herein, at least one of the plurality of buses includes signal lines routed to perform a bit permutation operation incoming data. The bit permutation operation is one of a plurality of operations associated with a symmetric key function.
AI classification
AI hardware0.98
Evolutionary computation0.06
Knowledge representation0.00
Natural language0.00
Speech0.00
Machine learning0.00
Vision0.00
Planning0.00
Ownership
INTEL CORPORATION
assignment · 94150625
Assignors
CALLUM, ROY
On an employer assignment, the assignors are typically the inventors.
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