ON-DIE ADAPTIVE ARRANGEMENTS FOR CONTINUOUS PROCESS, VOLTAGE AND TEMPERATURE COMPENSATION

Patent №

US 6,326,802

Granted

2001-12-04

Filed 1999

Owner

INTEL CORPORATION

Lab

AI components

2

ml · hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

09409387

An impedance matching arrangement, including an adaptive circuit. The adaptive circuit includes a first adaptive portion allowing impedance matching according to a predetermined first weighting scheme, and a second adaptive portion allowing impedance matching according to a predetermined second weighting scheme which differs from the first weighting scheme. The first adaptive portion is operable substantially during initialization times, and the second adaptive portion is operable substantially outside initialization times. The first adaptive portion may have a binary weighting scheme, and the second adaptive portion may have a linear weighting scheme. Finally, the adaptive 1 circuit is provided as a portion of an integrated circuit (IC) die.

AI classification

AI hardware0.97
Machine learning0.63
Evolutionary computation0.03
Planning0.00
Knowledge representation0.00
Natural language0.00
Vision0.00
Speech0.00

Ownership

INTEL CORPORATION

assignment · 103000297

Assignors

NEWMAN, PAUL F., JONES, JEFF R., TAYLOR, GREG, LIM, CHEE HOW, PASDAST, GERALD

On an employer assignment, the assignors are typically the inventors.

From the same owner

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