FLEXIBLE EVENT MONITORING COUNTERS IN MULTI-NODE PROCESSOR SYSTEMS AND PROCESS OF OPERATING THE SAME

A flexible event monitoring counter apparatus and process are provided for a processor system including a plurality of nodes, each node having a processor and a portion of a total main memory of the processor system. One example of such a processor system is a Non-Uniform-Memory-Architecture (NUMA) system. In order to reduce the total number of counters necessary, the counter structure will track certain ones of a type of event which occur in the processor system, determined in accordance with a predetermined standard to be most interesting, while discarding other ones of the same type of event determined by the standard to be less interesting. In accordance with one embodiment, the type of event which is tracked or discarded can be page accesses to pages of the total main memory. The standard of most interesting events can be based on the pages which receive the most requests for remote access from a node other than the node where the requested page is located. The information regarding the most interesting events can be used, if desired, to make decisions regarding migration and/or replication of pages between the different nodes.