DIGITAL CIRCUIT LAYOUT TECHNIQUES

Patent №

US 6,360,352

Granted

2002-03-19

Filed 1998

Owner

EXEMPLAR LOGIC, INC.

+1 more

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

09118225

A technique for analyzing digital circuits to identify pin swaps is provided for circuit layout and similar tasks in which the circuit is first decomposed into fanout-free regions. Quasi-canonical forms or models of the fanout free region are created from which a swap structure is created so that pins swap groups can be identified.

AI classification

AI hardware0.85
Planning0.37
Knowledge representation0.07
Natural language0.02
Evolutionary computation0.01
Vision0.00
Machine learning0.00
Speech0.00

Ownership

EXEMPLAR LOGIC, INC.

assignment · 102680809

MENTOR GRAPHICS CORPORATION

merger · 128020805

Assignors

WALLACE, DAVID E.

On an employer assignment, the assignors are typically the inventors.

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