Patent №
US 6,385,249
Granted
2002-05-07
Filed 2000
Owner
SONY CORPORATION
Lab
—
AI components
1
vision
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
09572260
A picture reducing circuit 1 reduces a supplied original picture. A higher picture memory 2 stores an input higher picture. A predictive tap extracting circuit 3 extracts predictive taps from the higher picture stored in the higher picture memory 2 and outputs the extracted predictive taps to a mapping circuit 4, predictive coefficient generating circuit 5, and pixel value updating circuit 8. The mapping circuit 4 calculates a linear combination of predictive taps and predictive coefficients and obtains a predictive picture. The predictive picture is output to an error calculating circuit 6. The error calculating circuit 6 calculates an error (S/N ratio) between pixel value of the predictive picture and that of the original picture. A comparing and determining circuit 7 controls a non-linear processing circuit 9 corresponding to the difference of the errors. The non-linear processing circuit 9 adds or subtracts a predetermined value to/from the pixel value of each pixel of the updated higher picture corresponding to the variation amount of pixel value updated by the pixel value updating circuit 8.
AI classification
Ownership
SONY CORPORATION
assignment · 110630229
Assignors
KONDO, TETSUJIRO, TAKAHASHI, KENJI, KOBAYASHI, NAOKI, WATANABE, YOSHINORI
On an employer assignment, the assignors are typically the inventors.