PACKET SWITCH CONTROL WITH LAYERED SOFTWARE

Patent №

US 6,400,925

Granted

2002-06-04

Filed 1999

Owner

TRW INC.

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

09258167

A communications satellite (201) has an on-board high speed packet switch for switching transmitted data packets. The packet switch (502) is part of a processor subsystem (501) which also includes a number of demodulators (5031 to 503n) demodulating signals received from an uplink downconverter. All of the processors in the processor subsystem (501) are organized into a loosely coupled, distributed, architecture of general purpose computer modules (601) and digital signal processor modules (602) having both primary and redundant processors and being connected to each other by dual redundant PCI buses. Software and firmware is layered and distributed redundantly over the processor modules (601, 602).

AI hardwareH04L 49/3081H04B 7/18515H04B 7/18589H04L 49/203H04L 49/254H04L 49/255H04L 49/552H04Q 11/0478+2 more

AI classification

AI hardware0.92
Speech0.01
Natural language0.00
Machine learning0.00
Vision0.00
Planning0.00
Knowledge representation0.00
Evolutionary computation0.00

Ownership

TRW INC.

assignment · 97990102

Assignors

TIRABASSI, MARIA A., ARENBERG, EDWARD A.

On an employer assignment, the assignors are typically the inventors.

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