METHOD FOR ERROR RECOGNITION IN A PROCESSOR SYSTEM

Patent №

US 6,401,217

Granted

2002-06-04

Filed 1998

Owner

SIEMENS AKTIENGESELLSCHAFT

Lab

AI components

3

kr · planning · hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

09120786

The method enables an improved and faster error recognition of software errors in a processor or processor system in which programs subject information received from other programs to an error check, particularly to a plausibility check, and, given acquisition of error statuses, output a corresponding error message to the operating system. This error message contains an indication of the other program generating the faulty information and is stored in a respective error message table. The operating system thus learns of programs suspected of working in a faulty way from other programs collaborating with these programs, so that program errors can be recognized and localized significantly faster.

AI classification

AI hardware0.99
Planning0.98
Knowledge representation0.98
Machine learning0.07
Vision0.01
Natural language0.00
Speech0.00
Evolutionary computation0.00

Ownership

SIEMENS AKTIENGESELLSCHAFT

assignment · 94470381

Assignors

CLARK, MARK, SONNENSCHEIN, ERICH

On an employer assignment, the assignors are typically the inventors.

From the same owner

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