CACHE FENCING FOR INTERPRETIVE ENVIRONMENTS

An apparatus and method for cache fencing allows programmatic control of the access and duration of stay of selected executables within processor cache. In one example, an instruction set implementing a virtual machine may store each instruction in a single cache line as a compiled, linked loaded image. After loading, cache fencing is conducted to prevent the cache from flushing the contents or replacing the contents of any cache line. Typically, in so doing, attributes associated with pages in physical memory are employed. The attributes include an “uncacheable” attribute flag, which is set for the entire contents of physical memory except that containing the selected executables which are intended to remain within cache memory. The attributes may also include page sizing attributes which are utilized to define pages that contain interpreter instructions and pages that do not contain interpreter instructions.