PIPELINE COMPUTER DIVIDING A VARIABLE-LENGTH DATA-HANDLING INSTRUCTION INTO FIXED-LENGTH DATA-HANDLING INSTRUCTIONS

The present invention provides a pipelined computer which processes variable-length data without using branch instructions for speedy execution of a variable-length data-handling software instruction. Upon receiving a variable-length data-handling instruction from an instruction supply unit 1, an instruction division unit 2 divides the instruction into a plurality of derived micro instructions that handle fixed-length data. A reservation station 5 sends the derived micro instructions to an execution unit 6 and a redundant instruction detection unit 9 in a sequence in which the derived micro instructions were generated during the division. The redundant instruction detection unit 9 monitors the remaining derived micro instructions. An instruction deletion control unit 8 deletes redundant micro instructions in the reservation station 5. An instruction end operation unit 7 sets the state of the redundant derived micro instructions in the reorder buffer 4 to “execution completed state”.