Patent №
US 6,505,340
Granted
2003-01-07
Filed 2000
Owner
SHARP KABUSHIKI KAISHA
Lab
—
AI components
1
hardware
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
09728075
A circuit synthesis method includes the steps of converting a behavioral description describing a behavior of calculation processing into a control data flowgraph; assigning at least one calculation, at least one input and at least one output in the control data flowgraph into prescribed time slots; assigning the at least one calculation, a plurality of data dependency edges, the at least one input and the at least one output respectively to at least one calculation device, at least one register, at least one input pin and at least one output pin; generating a plurality of paths corresponding to the plurality of data dependency edges; and detecting a first false path among the plurality of paths.
AI classification
Ownership
SHARP KABUSHIKI KAISHA
assignment · 113260353
Assignors
NISHIDA, KOICHI, OKADA, KAZUHISA
On an employer assignment, the assignors are typically the inventors.