METHODS AND APPARATUS FOR PERFORMING A SIGNED SATURATION OPERATION

Patent №

US 6,529,930

Granted

2003-03-04

Filed 1999

Owner

HITACHI AMERICA, LTD.

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

09393591

Methods and apparatus for performing signed saturation of binary numbers to arbitrary powers of two are described. Given an n-bit signed binary word, the methods and apparatus of the present invention perform a signed saturation to k-bits where the value of k can vary such that 1<k<n. Through the use of hardware circuits of the present invention the signed saturation operation is implemented in a more efficient manner than software implementations which utilize multiple compare operations. The signed saturation circuits of the present invention can be incorporated into processors, e.g., CPUs, to provide a hardware implementation within a CPU for a signed saturation processor instruction, e.g., either a SISD OR SIMD saturation command or instruction. The signed saturation circuits can accept the data value upon which the operation is to be performed, and, optionally, a value k indicating the number of bits to which individual data value are to be saturated. In MPEG-2 decoding, at the end of the inverse quantization process the quantities being processed undergo signed saturation to 12-bits. In various embodiments, one or more signed saturation circuits of the present invention are incorporated into a fixed function hardware circuit that performs, for example, MPEG-2 video decoding to perform the saturation to 12 bits.

AI hardwareG06F 7/48G06F 7/49921

AI classification

AI hardware0.68
Vision0.00
Evolutionary computation0.00
Machine learning0.00
Knowledge representation0.00
Speech0.00
Natural language0.00
Planning0.00

Ownership

HITACHI AMERICA, LTD.

assignment · 102390758

Assignors

SAZZAD, SHARID MOHAMMAD, PLOTNICK, MICHAEL A.

On an employer assignment, the assignors are typically the inventors.

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