Patent №
US 6,556,571
Granted
2003-04-29
Filed 1999
Owner
NEC USA, INC.
Lab
—
AI components
1
hardware
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
09317964
A novel architecture and implementation of a Round-Robin Scheduler (RRS) for high capacity ATM switches is presented. A port is selected from a set of alternating real-time/non real-time priority ports, based on the priority of the port, the minimum cell-rate (MCR) assigned to the ports and the backpressure signals coming from the output buffers. A fast implementation of the scheduler was derived using a binary tree structure. The nodes in the binary tree act as “cut through” switches, and thus the scheduler is able to operate at high speed. This scheduler is amenable for implementation in high speed silicon technology. It is compact in terms of logic gate requirements, very scalable and is a viable option in Gigabit ATM switches.
AI classification
Ownership
NEC USA, INC.
assignment · 99880166
Assignors
SHAHIRER, SHARIF M., ISHII, ALEXANDER T.
On an employer assignment, the assignors are typically the inventors.