OPERATING METHOD FOR AN INTEGRATED MEMORY HAVING WRITEABLE MEMORY CELLS AND CORRESPONDING INTEGRATED MEMORY

Before a write and/or read access to one of the memory cells is carried out, a security information stored in a security memory cell is read out. If the security information is characterized by a first logic state an error signal is generated. If the read-out security information is characterized by a second logic state the memory cell is accessed and a write access is carried out to the security memory cell during which a new security information to be he stored having the second logic state is written to the cell.