HIGHLY EFFICIENT DESIGN OF STORAGE ARRAY FOR USE IN FIRST AND SECOND CACHE SPACES AND MEMORY SUBSYSTEMS

Patent №

US 6,584,546

Granted

2003-06-24

Filed 2001

Owner

IRIS HOLDINGS, INC.

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

09761068

A method of operating a cache memory includes the step of storing a set of data in a first space in a cache memory, a set of data associated with a set of tags. A subset of the set of data is stored in a second space in the cache memory, the subset of the set of data associated with a tag of a subset of the set of tags. The tag portion of an address is compared with the subset of data in the second space in the cache memory in that said subset of data is read when the tag portion of the address and the tag associated with the subset of data match. The tag portion of the address is compared with the set of tags associated with the set of data in the first space in cache memory and the set of data in the first space is read when the tag portion of the address matches one of the sets of tags associated with the set of data in the first space and the tag portion of the address and the tag associated with the subset of data in the second space do not match.

AI hardwareG06F 12/0864G06F 9/3885G06F 12/0862G06F 12/0897G11C 11/40615G06F 12/0802G06F 12/0846G06F 12/0895+4 more

AI classification

AI hardware0.98
Knowledge representation0.09
Natural language0.02
Machine learning0.00
Evolutionary computation0.00
Vision0.00
Planning0.00
Speech0.00

Ownership

IRIS HOLDINGS, INC.

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