Patent №
US 6,603,331
Granted
2003-08-05
Filed 2001
Owner
XILINX, INC.
Lab
—
AI components
1
hardware
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
10024841
A CPLD employs a low-voltage, non-degenerative transmitter circuit to eliminate the need for a dedicated control pin to provide the relatively high voltage levels required to verify the program states of programmable memory cells. Eliminating the need for a dedicated control pin frees up valuable chip real estate for the inclusion of an additional general-purpose input/output pin.
AI classification
AI hardware0.67
Natural language0.02
Evolutionary computation0.01
Vision0.01
Machine learning0.00
Speech0.00
Knowledge representation0.00
Planning0.00
Ownership
XILINX, INC.
assignment · 124060791
Assignors
OM'MANI, HENRY A., DAVIES, JR., THOMAS J.
On an employer assignment, the assignors are typically the inventors.
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