Patent №
US 6,604,232
Granted
2003-08-05
Filed 2000
Owner
SHARP KABUSHIKI KAISHI
+1 more
Lab
—
AI components
2
planning · hardware
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
09741057
A high-level synthesis method comprising the steps of converting an operating description describing one or more operations to a control data flow graph (CDFG) including one or more nodes representing the one or more operations and one or more I/O branches representing a flow of data, scheduling the CDFG obtained by the converting step, and allocating one or more logic circuits required for executing the CDFG obtained by the scheduling step. A portion of the CDFG in the converting step is subjected to logical synthesis in advance to generate a node, and the portion of the CDFG is replaced with that node.
AI classification
Ownership
SHARP KABUSHIKI KAISHI
assignment · 114010219
SHARP KABUSHIKI KAISHA
assignment · 133790051
Assignors
OKADA, KAZUHISA, NISHIDA, KOICHI, OKADA, KAZUHISA, NISHIDA, KOICHI
On an employer assignment, the assignors are typically the inventors.