INFORMATION PROCESSING APPARATUS AND MEMORY CONTROL METHOD

A page table on a main storage contains a correspondence between guest virtual address and a host real address, and a TLB in a processor holds said correspondence calculated by a previous address translation. A PTBR holds a real address of a page table. When a processor detects a TLB purge, the processor starts a host when detecting a TLB purge. The host examines a virtual space change processing executed by the guest, and stores a correspondence between a new guest virtual address and a new host real address in the page table.